• info@sionsemi.com
  • Bangalore : +91 776 050 4602
  • Hyderabad : +91 79932 79935
  • Kochi : +91 79932 79934
  • Singapore : +65 6100 7470

Physical Design Services

Our Physical Design team experienced in PD sign-off for various technology nodes such as 45nm, 28nm, 16nm, 7nm with designs levels like Full-chip/ SoC/ Subsystem/ IP/ Block level, SION Provides services from RTL/Netlist to GDSII flow ensure an aggressive schedule to launch without sacrificing QOR.

  • Our PD team expertise in:
    • Full-Chip/System/SoC/IP/Cluster/Subsystem/Block level Synthesis
    • DFT Insertion MBIST, BIST, ATPG, Scan and Fault Simulations
    • IO Planning/Floor-Planning/Power Planning/P&R/Metal Fills
    • Design Partitioning And Hardening
    • Abstract view generation and pinning
    • Optimization of Area by estimation of Macros/IOs available logic
    • Timing Budgeting and closure
    • CTS and Analysis
    • Full-Chip level Integration of ARM Cores, IP's, Subsystem, Hard-Macros
    • Semi-Custom / Full Custom Implementations
    • Full-Chip level Physical Verification DRC/ LVS/ Antenna /DFM checks
    • Cross talk analysis
    • Formal equivalence checks
    • Low power implementations UPF / CPF flow development

  • Our PD Team comprises of

  • DFT team provides services for:
    • SCAN Insertion
    • Logic BIST
    • Memory BIST
    • ATPG
    • Fault Simulations
  • Implementation Team:
    • Synthesis Flow
    • Constraints & Exceptions
    • Optimization techniques for timing and power
    • Analysis & Debug skills for complex issues
    • LEC
    • Timing Analysis for Multi-Mode Multi-Corner
    • IO Planning &Partitioning
    • Top Level Floor-Planning & Integration
    • Block Level P & R
    • Clock tree Building
    • ECO Fixes & Signal integrity Analysis
    • STA Sign-Off, Timing Closure
    • PV Sign-Off flow setup & Execution
    • IR Drop Analysis
    • Supporting SI & Package team
    • Tape-Out

Featured in "Top 10 IOT Startups of Bangalore in 2019" by SiliconIndia

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Case Studies

ProAthlet IOT Tracker

Turnkey product development of low power battery operated Cloud-based wearable 4G IOT tracking device coupled with iOS and Android apps.

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AI Camera FPGA Prototype

Xilinx Zynq FPGA based prototype of next-generation AI Smart conference camera that recognizes face and audio of conference participants.

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ARM SoC Integration

IOT communication based Cortex M4 ARM SoC integration, Peripheral verification, FPGA Prototyping and firmware development.

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100G Ethernet Verification

Functional verification of 100G Ethernet pipeline IP, meant to be used for various network acceleration and connectivity applications.

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